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Pipelined multiprocessor system-on-chip for multimedia /

This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize t...

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Bibliographic Details
Main Authors: Javaid, Haris, (Author), Parameswaran, Sri, 1962-, (Author)
Corporate Author: SpringerLink (Online service)
Format: Online Book
Language:English
Published: Cham : Springer, 2014.
Subjects:
Online Access:Online version
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Description
Summary:This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers.
Physical Description:1 online resource (viii, 169 pages) : illustrations (some color)
Bibliography:Includes bibliographical references and index.
ISBN:3319011138 (electronic bk.)
9783319011134 (electronic bk.)
Access:Electronic access restricted to Villanova University patrons.